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3
3.1
Functional Description
User Accessible Data Array
A user accessible data array allows for each device to be customized. The array consists of an OTP factory programmable
block, an OTP user programmable block, and read only registers for device status. The OTP blocks incorporate independent
error detection circuitry for fault detection (reference Section 3.2 ). Portions of the factory programmable array are reserved for
factory-programmed trim values. The user accessible data is shown in Table 2 .
Table 2. User Accessible Data
Byte
Nibble
Bit Function
Nibble
Bit Function
Addr
(XLong
Msg)
$00
$01
$02
$03
$04
$05
Register
SN0
SN1
SN2
SN3
DEVCFG1
DEVCFG2
Addr
(Long
Msg)
$01
$03
$05
$07
$09
$0B
7
SN[7]
SN[15]
SN[23]
SN[31]
0
LOCK_U
6
SN[6]
SN[14]
SN[22]
SN[30]
0
PCM
5
SN[5]
SN[13]
SN[21]
SN[29]
1
SYNC_PD
4
SN[4]
SN[12]
SN[20]
SN[28]
0
LATENCY
Addr
(Long
Msg)
$00
$02
$04
$06
$08
$0A
3
SN[3]
SN[11]
SN[19]
SN[27]
0
DATASIZE
2
SN[2]
SN[10]
SN[18]
SN[26]
RNG[2]
BLANKTIME
1
SN[1]
SN[9]
SN[17]
SN[25]
RNG[1]
P_CRC
0
SN[0]
SN[8]
SN[16]
SN[24]
RNG[0]
BAUD
Type
F, R
$06
DEVCFG3
$0D
TRANS_MD[1] TRANS_MD[0]
LPF[1]
LPF[0]
$0C
TIMESLOTB[9] TIMESLOTB[8] TIMESLOTA[9] TIMESLOTA[8]
$07
DEVCFG4
$0F
TIMESLOTA[7] TIMESLOTA[6] TIMESLOTA[5] TIMESLOTA[4]
$0E
TIMESLOTA[3] TIMESLOTA[2] TIMESLOTA[1] TIMESLOTA[0]
$08
DEVCFG5
$11
TIMESLOTB[7] TIMESLOTB[6] TIMESLOTB[5] TIMESLOTB[4]
$10
TIMESLOTB[3] TIMESLOTB[2] TIMESLOTB[1] TIMESLOTB[0]
U, R
$09
$0A
$0B
DEVCFG6
DEVCFG7
DEVCFG8
$13
$15
$17
INIT2_EXT
MONTH[3]
UD[2]
ASYNC
MONTH[2]
UD[1]
U_DIR[1]
MONTH[1]
UD[0]
U_DIR[0]
MONTH[0]
DAY[4]
$12
$14
$16
U_REV[3]
YEAR[3]
DAY[3]
U_REV[2]
YEAR[2]
DAY[2]
U_REV[1]
YEAR[1]
DAY[1]
U_REV[0]
YEAR[0]
DAY[0]
$0C
$0D
SC
MFG_ID
$19
$1B
0
MFG_ID[7]
TM_B
MFG_ID[6]
RESERVED
MFG_ID[5]
IDEN_B
MFG_ID[4]
$18
$1A
OC_INIT_B
MFG_ID[3]
IDEF_B
MFG_ID[2]
OFF_B
MFG_ID[1]
0
MFG_ID[0]
R
U, R
Type codes
F: Freescale programmed OTP location
U: User programmable OTP location via PSI5
R: Readable register via PSI5
3.1.1
Device Serial Number Registers
A unique serial number is programmed into the serial number registers of each device during manufacturing. The serial num-
ber is composed of the following information:
Bit Range
SN[12:0]
SN[31:13]
Content
Serial Number
Lot Number
Serial numbers begin at 1 for all produced devices in each lot and are sequentially assigned. Lot numbers begin at 1 and are
sequentially assigned. No lot will contain more devices than can be uniquely identified by the 13-bit serial number. Depending on
lot size and quantities, all possible lot numbers and serial numbers may not be assigned.
The serial number registers are included in the factory programmed OTP CRC verification. Reference Section 3.2.1 for details
regarding the CRC verification. Beyond this, the contents of the serial number registers have no impact on device operation or
performance, and are only used for traceability purposes.
MMA52xxKW
Sensors
12
Freescale Semiconductor, Inc.
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